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EDA Solutions provides premier ASIC Design, Verification,  
Implementation, and EDA Tools and Methodology Development
services.

Recent ASICs include:
1. 6.0 million gate, TI SR40 (0.13 micron), 312 MHz core clock, multiple
clock domains, DDR interface, high-speed serdes.
2. 6.0 million gate, IBM CU-11 (0.11 micron), 250 MHz core clock,
multiple clock domains, DDR interface, high-speed serdes.
3. 2.0 million gate, IBM SA-27E (0.13 micron), 150MHz core clock,
multiple clock domains,

Major clients include:
       Cisco
       National Semiconductor
       Sony
       Fujitsu
       Sun Microsystems
       Intel
       C-Cube

CrystalBall Lite

Die Size Estimator for ASICs.
Use during RFQ and ASIC vendor
selection stage.

CrystalBall Classic

ASIC Floorplanner
Use for creating ASIC Floorplan
during Pre-netlist and Post-netlist
Stages.

For enquiries regarding obtaining products and services:
Please contact us at:
   Phone: (510)797-1681
   Fax:       (510)797-9207
   sales@edasol.com

CrystalBall Time

ASIC Timing Report Analyzer
Use during Postlayout Timing Report
Analysis for fast Timing Closure.